A combinational circuit is a network of gates whose outputs depend only on the present inputs. There is no memory, no clock and no history. That makes it the easiest kind of logic to design, test and reason about. Adders, decoders, multiplexers and code converters are all combinational, and a synchronous chip is mostly combinational logic sitting between registers.
14 min read | Beginner Level
What You'll Learn
- What makes a circuit combinational, and how it differs from a sequential one
- A five-step procedure that turns a specification into gates
- A worked design: a BCD to excess-3 converter that uses don't-cares and K-maps
- How to check a design and avoid the usual combinational-logic mistakes
Quick Answer: Combinational vs. Sequential Logic
| Combinational | Sequential | |
|---|---|---|
| Output depends on | Present inputs only | Present inputs and stored state |
| Feedback | None | Memory elements feed state back |
| Clock | Not needed | Usually sets when state changes |
| Typical blocks | Adders, decoders, multiplexers, comparators, code converters | Registers, counters, shift registers, state machines |
| Described by | Truth table or Boolean equations | State table or state diagram |
What Makes Logic Combinational?
A combinational circuit has no feedback. Its n inputs and m outputs are related by m Boolean functions, so the same inputs always give the same outputs, whatever happened before.
"Combinational" does not mean "instant". Every gate has a propagation delay, so the output needs time to settle after an input changes, and it can show a brief wrong value on the way (a hazard). Once settled, it is a pure function of the inputs. See Propagation Delay & Critical Path and Hazards & Glitches for the timing side.
Where Is Combinational Logic Used?
A pipeline stage in a processor is a block of combinational logic (an adder, a decoder, a multiplexer tree) between two banks of flip-flops. The first bank launches the inputs on a clock edge, the logic settles, and the second bank captures the result on the next edge.
The Design Procedure
The same five steps take any specification to gates:
Combinational design procedure
1. State the problem: list the inputs, the outputs and what each means
2. Write the truth table: one row per input combination
3. Simplify each output (K-map or algebra); use don't-cares for
input combinations that can never occur
4. Draw the gates from the simplified equations
5. Verify: check every truth-table row against the final circuit
Steps 2 and 3 do most of the work. A K-map finds the smallest two-level form for up to four variables (see Karnaugh Maps).
Worked Example: BCD to Excess-3 Converter
Excess-3 stores a decimal digit as its value plus 3. The converter takes a BCD digit A B C D (A is the most significant bit) and produces the code w x y z.
| Digit | A | B | C | D | w | x | y | z |
|---|---|---|---|---|---|---|---|---|
| 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
| 1 | 0 | 0 | 0 | 1 | 0 | 1 | 0 | 0 |
| 2 | 0 | 0 | 1 | 0 | 0 | 1 | 0 | 1 |
| 3 | 0 | 0 | 1 | 1 | 0 | 1 | 1 | 0 |
| 4 | 0 | 1 | 0 | 0 | 0 | 1 | 1 | 1 |
| 5 | 0 | 1 | 0 | 1 | 1 | 0 | 0 | 0 |
| 6 | 0 | 1 | 1 | 0 | 1 | 0 | 0 | 1 |
| 7 | 0 | 1 | 1 | 1 | 1 | 0 | 1 | 0 |
| 8 | 1 | 0 | 0 | 0 | 1 | 0 | 1 | 1 |
| 9 | 1 | 0 | 0 | 1 | 1 | 1 | 0 | 0 |
| 10-15 | X | X | X | X | X | X | X | X |
The codes 1010 to 1111 are not valid BCD, so they never occur. Their outputs are don't-cares (X): each can be read as 1 or 0, whichever makes a group bigger.
Simplified outputs (don't-cares used) w = A + BC + BD x = B'C + B'D + BC'D' y = CD + C'D' z = D' Literal count: 17 with don't-cares, 33 without them
Check digit 5 (A B C D = 0 1 0 1): w = 0 + 0 + 1 = 1, x = 0, y = 0 and z = 1, so w x y z = 1000 = 8 = 5 + 3. Without the don't-cares the same outputs need 33 literals instead of 17, nearly twice the gates.
Don't-care proportion rules one don't-care used as a 1 -> a group can double in size group doubles in size -> one literal fewer in that term one literal fewer -> one gate input and two transistors fewer don't-cares treated as 0 -> none of these savings
Quick Check
Q: Why is the converter smaller when the outputs for 1010 to 1111 are left as don't-cares instead of 0?
Show Answer
A don't-care can be grouped with neighbouring 1s, so groups get larger and terms lose literals. Forcing those outputs to 0 removes that freedom and forces extra terms to exclude the unused codes.
The converter could also be built as a 4-bit adder that adds 3 (see Full-Adder). An adder defines the outputs for 1010 to 1111 as well, which removes the don't-cares and costs extra gates.
Where Are Code Converters Used?
Display drivers turn BCD digits into seven-segment patterns, keypad scanners convert row and column lines into key codes, and arithmetic units convert between number formats. Each is a truth table with don't-cares for the codes that cannot occur.
Common Mistakes
Mistake #1: Checking only some rows
Wrong: Testing the final circuit with the inputs used while designing it
Right: Compare all 2n rows of the truth table with the final circuit.
Why? A simplification slip usually changes the output for one or two input combinations, and only a full check finds them.
Mistake #2: Feeding an output back into its own logic
Wrong: An output fed back into an input of its own logic, y = a . y
Right: Route every signal from inputs to outputs without a loop.
Why? A combinational loop has no stable state or becomes an unintended latch, and timing tools cannot analyse it.
Mistake #3: Treating unused input codes as zeros
Wrong: Specifying F = 0 for BCD codes 10 to 15
Right: Mark them as don't-cares (X in the truth table).
Why? Zeros force the tool to build logic that excludes those codes. Here that nearly doubles the gate count.
Practice Exercise
Challenge: A "Multiple of Three" Detector
A BCD digit A B C D must give F = 1 for digits 0, 3, 6 and 9. Codes 10 to 15 never occur.
- Draw the truth table and mark the don't-cares.
- Find the minimal sum-of-products with and without the don't-cares and compare the literal counts.
Hint
Group a don't-care with a 1 only where it makes the group larger.
Solution
1. F = 1 for 0000, 0011, 0110, 1001; X for 1010 to 1111; 0 otherwise. 2. With don't-cares: F = A'B'C'D' + AD + B'CD + BCD' (4 terms, 12 literals) Without don't-cares: F = A'B'C'D' + A'B'CD + A'BCD' + AB'C'D (4 terms, 16 literals) The don't-cares save 4 literals.
Summary
In this tutorial, you learned:
- A combinational circuit has no memory or feedback: outputs are functions of the present inputs only
- Design follows five steps: specify, truth table, simplify, draw or code, verify
- Don't-cares for impossible inputs shrink the logic: the BCD to excess-3 converter needs 17 literals instead of 33
- Check all 2n truth-table rows against the final circuit, and never feed an output back into its own logic
