uvm_object is the one of the base classes from where almost all UVM classes are derived. Typically configuration classes and data objects are derived from this class and are passed to different testbench components during the course of a simulation. There is often a need to copy, compare and print values in these classes.

UVM has included user-definable functions like do_copy() to copy, do_compare() to compare and do_print to print values in the class. But it can at times be an overhead to define all these methods for every class object created in the testbench. UVM comes with automation of core methods like copy, compare, pack, and print using `uvm_field_* macros. This avoids the need for a user implementation of the do_* methods for each function.

These macros expand into complicated code that may not be run-time efficient and are not generally recommended !

The `uvm_field_* macros are called inside `uvm_*_utils_begin and `uvm_*_utils_end macro blocks during factory registration.

ARGVariable name compatible with the macro type
FLAGDefault value is UVM_ALL_ON, ARG variable will be included in all data methods

FLAG types

All possible values for FLAG are shown in the table below. Multiple flags can be OR'ed together with the | operator to apply the required operations.

UVM_ALL_ONSet all operations on
UVM_DEFAULT[Recommended] Enables all operations. Additional flags may be turned off by default in the future versions
UVM_NOCOPYDo not copy this field
UVM_NOCOMPAREDo not compare this field
UVM_NOPRINTDo not print this field
UVM_NOPACKDo not pack/unpack this field
UVM_REFERENCEFor object types, operate on handles only (like no deep copy)

Print Options

The following flags can be OR'ed together to print in the required format.

UVM_BINPrint/record the field in binary
UVM_DECPrint/record the field in decimal
UVM_UNSIGNEDPrint/record the field in unsigned decimal
UVM_OCTPrint/record the field in octal
UVM_HEXPrint/record the field in hexadecimal
UVM_STRINGPrint/record the field in string format
UVM_TIMEPrint/record the field in time format

typedef enum {FALSE, TRUE} e_bool;

class Child extends uvm_object;
  string 	 m_name;
  logic[3:0] m_age;
  	`uvm_field_string 	(m_name, UVM_ALL_ON)
  	`uvm_field_int 		(m_age, UVM_ALL_ON)
  function new(string name="Child");

class Parent extends uvm_object;
  string 	m_name;
  bit[15:0]	m_age;
  int 		m_numbers[$];
  e_bool 	m_employed;
  Child 	m_child;
  	`uvm_field_enum			(e_bool, m_employed, UVM_ALL_ON)
  	`uvm_field_int			(m_age, UVM_ALL_ON)
  	`uvm_field_queue_int 	(m_numbers, UVM_ALL_ON)
  	`uvm_field_string 		(m_name, UVM_ALL_ON)
  	`uvm_field_object 		(m_child, UVM_ALL_ON)
  function new(string name="Parent");

module tb;
  initial begin
    Parent p = Parent::type_id::create("Parent");
    p.m_name = "Joey";
    p.m_employed = TRUE;
    p.m_age = 29;
    p.m_numbers = '{1234, 5678, 9011};
    p.m_child = new();
    p.m_child.m_name = "Joey Jr";
    p.m_child.m_age  = 1;
 Simulation Log
ncsim> run
UVM_INFO /playground_lib/uvm-1.2/src/base/uvm_root.svh(392) @ 0: reporter [UVM/RELNOTES] 

Name          Type          Size  Value  
Parent        Parent        -     @1829  
  m_employed  e_bool        32    TRUE   
  m_age       integral      16    'h1d   
  m_numbers   da(integral)  3     -      
    [0]       integral      32    'h4d2  
    [1]       integral      32    'h162e 
    [2]       integral      32    'h2333 
  m_name      string        4     Joey   
  m_child     Child         -     @1830  
    m_name    string        7     Joey Jr
    m_age     integral      4     'h1    
ncsim: *W,RNQUIE: Simulation is complete.