1. Nayan Naware
  2. General
  3. Sunday, 20 October 2019
How can we write an assertion for the following condition -

A signal X can either be low for one clock cycle or it can be low for 4 clock cycle.
Responses (3)
Accepted Answer Pending Moderation

property x_assert;
@(posedge clk) $fell(x) |-> ##[1:4] $rose(x);
endproperty

assert property(x_assert);


PS: This is if you want it to be anywhere between 1 and 4.
References
  1. https://www.edaplayground.com/x/3RQE
  1. more than a month ago
  2. General
  3. # 1
Accepted Answer Pending Moderation
shouldn't it be


$fell(x) |=> ($rose(x)) or (##3 $rose(x)) ;


since he only needs either 1 or 4 and not in between.
  1. more than a month ago
  2. General
  3. # 2
Accepted Answer Pending Moderation
shouldn't it be


$fell(x) |=> ($rose(x)) or (##3 $rose(x)) ;


since he only needs either 1 or 4 and not in between.


Yes, I realize now that is what he meant.
  1. more than a month ago
  2. General
  3. # 3
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