Member 'Downloads' section will be deprecated from Jan 1, 2020.
  1. Nayan Naware
  2. General
  3. Sunday, 20 October 2019
How can we write an assertion for the following condition -

A signal X can either be low for one clock cycle or it can be low for 4 clock cycle.
Responses (0)


There are no replies made for this post yet.
However, you are not allowed to reply to this post.

You consent to our cookies if you continue to use our website. To know more about cookies, see our privacy policy. I accept cookies from this site.

Agree