1. Chen Yong
  2. UVM
  3. Saturday, 27 July 2019
Hi,
I'm learning examples with virtual-sequence. The environment has instantiated three agents, one for apb, one for wb and one for spi. There is a virtual sequencer to generates sequences to these three different agents. I'm interested in this question: is it possible to invoke sequence library from virtual sequencer/sequence? for example, suppose I have derivate a sequence library from apb_rw_seq as apb_seq_lib. The apb_seq_lib will invoke apb_rw_seq for random times. Now I would like to invoke this apb_seq_lib through top test with virtual sequence. Is this possible? If so, how can I do this? Is there an example? thanks
Responses (3)
Accepted Answer Pending Moderation
Refer the two links below. I think what you would need to do is create a sequence library class object, instantiate it within the virtual sequence and execute it within the body method of the virtual sequence.


class virt_seq extends uvm_sequence;
`uvm_object_utils (virt_seq)
`uvm_declare_p_sequencer (virtual_sequencer)

apb_rw_seq m_apb_rw_seq;
wb_reset_seq m_wb_reset_seq;
spi_tx_seq m_spi_tx_seq;
my_seq_lib m_seq_lib0;

function new (string name = "virt_seq");
super.new (name);
endfunction

virtual task body();
m_seq_lib0 = my_seq_lib::type_id::create("m_seq_lib0");
cfg_lib();
m_seq_lib0.start(p_sequencer);
endtask

virtual task cfg_lib ();
`uvm_info ("CFG_PHASE", "Add sequences to library", UVM_MEDIUM)
m_seq_lib0.selection_mode = UVM_SEQ_LIB_RANDC;
m_seq_lib0.min_random_count = 5;
m_seq_lib0.max_random_count = 10;

m_seq_lib0.add_typewide_sequence (apb_rw_seq::get_type());
m_seq_lib0.add_typewide_sequence (spi_rw_seq::get_type());
m_seq_lib0.add_typewide_sequence (wb_reset_seq::get_type());
m_seq_lib0.init_sequence_library();
endtask
endclass

class base_test extends uvm_test;
`uvm_component_utils (base_test)

top_env m_top_env;
virt_seq m_virt_seq;

function new (string name, uvm_component parent = null);
super.new (name, parent);
endfunction : new

virtual function void build_phase (uvm_phase phase);
super.build_phase (phase);
m_top_env = top_env::type_id::create ("m_top_env", this);
m_virt_seq = virt_seq::type_id::create ("m_virt_seq");
endfunction

virtual task main_phase (uvm_phase phase);
super.main_phase (phase);
phase.raise_objection (this);
m_virt_seq.start (m_top_env.m_virt_seqr);
phase.drop_objection (this);
endtask

virtual task shutdown_phase (uvm_phase phase);
super.shutdown_phase (phase);
`uvm_info ("SHUT", "Shutting down test ...", UVM_MEDIUM)
endtask
endclass
References
  1. https://www.edaplayground.com/x/4yTA
  2. https://www.chipverify.com/uvm/using-sequence-library
  1. 3 weeks ago
  2. UVM
  3. # 1
Accepted Answer Pending Moderation
Thanks for the kind reply. Here is a question:


virtual task body();
m_seq_lib0 = my_seq_lib::type_id::create("m_seq_lib0");
cfg_lib();
m_seq_lib0.start(p_sequencer);
endtask


where did this p_sequencer defined with sequence library? I'm confused by this. Thanks
  1. 2 weeks ago
  2. UVM
  3. # 2
Accepted Answer Pending Moderation
p_sequencer handle is declared to be of type virtual_sequencer using the macro `uvm_declare_p_sequencer and the virtual sequence is thus started on the virtual sequencer.
  1. 2 weeks ago
  2. UVM
  3. # 3
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