SystemVerilog Loops - when and where to use

Loooooops. A very powerful tool. SystemVerilog has many different types of loops that can be used in a variety of ways. Using the correct loop type in the correct context helps in readability, maintenance, and shorter code. Here are a few tips to know when to use what type of loop in SystemVerilog.

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Power of SystemVerilog Constraints

SystemVerilog constraints are pretty amazing ! Lets see one use case where constraints are used to generate two queues of random sizes with unique values. Let us assume total number of elements in each queue should be less than or equal to 10.

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Recent Comments
Guest — DVJose
I think a few of the constraints are redundant here. The code could be much shorter. With regards to the unique constraint - (1)... Read More
Monday, 01 June 2020 21:37
Thanks for your comments ! Yes, I agree that unique can be brought out of the loop. However, with only l_q.size() + l_q2.size() in... Read More
Monday, 01 June 2020 22:05
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