There are several techniques used in digital design verification, including:
- Functional Simulation: Simulation involves running the digital design on a computer or simulator to validate its functionality. The simulation environment may include various inputs, such as test vectors, to ensure that the design behaves as expected.
A self-checking testbench is a type of testbench that is designed to automatically check the correctness of a digital design's output, without the need for manual intervention. In a self-checking testbench, the testbench itself verifies the design's output, rather than relying on a separate verification tool or manual inspection. Here's an example of a simple self-checking testbench:
A linear random testbench is a type of testbench that uses random input stimuli to test a digital design. It is called "linear" because the input stimuli are generated in a sequential, linear fashion, as opposed to a more complex state machine-based approach. Here's an example of a simple linear random testbench:
A state machine-based testbench is a testbench that uses a state machine to control the stimulus applied to the DUT and the expected results. It involves defining a set of states and transitions that represent the different stages of the test, and the input stimuli and expected outputs associated with each state.
In a linear testbench, the test stimuli are applied to the design sequentially, in a linear fashion, to verify the operation of the design under specific input conditions.
The linear testbench typically consists of a sequence of input vectors that are applied to the design under test, along with the expected output values for each input vector. The input vectors are usually created based on the expected behavior of the design under test, and the expected output values are obtained from the design specification.
