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This session will focus on configuring componentB to request for data from componentA, using the get() method. Since componentB is the initiator here, we'll look at that first.


GitHub

You can download/clone the example code from our repository at GitHub.


TestBench

Declare a uvm_blocking_get_port class object and instantiate it in the build_phase() using the new () method. Similiar to put(), use get() method to receive the data packet sent by componentA.

 
class componentB extends uvm_component;
   `uvm_component_utils (componentB)
 
   // Create a get_port to request for data from componentA
   uvm_blocking_get_port #(simple_packet) get_port;
 
   function new (string name = "componentB", uvm_component parent = null);
      super.new (name, parent);
   endfunction
 
   virtual function void build_phase (uvm_phase phase);
      super.build_phase (phase);
      get_port = new ("put_export", this);
   endfunction
 
   virtual task run_phase (uvm_phase phase);
      simple_packet pkt;
      repeat (5) begin
         get_port.get (pkt);
         `uvm_info ("COMPB", "ComponentA just gave me the packet", UVM_LOW)
         pkt.print ();
      end
   endtask
endclass
 

In componentA, we'll write the implementation details of the get() method used in componentB. For this purpose, create a uvm_blocking_get_imp class object and use the new () function to create an instance. Note that the argument in the get() task is output, and that's the way this packet is sent to the component which calls the get() method. For our simple purpose, we'll simply create and randomize the data packet, print it and send it across.

 
class componentA extends uvm_component;
   `uvm_component_utils (componentA)
 
   // Create an export to send data to componentB
   uvm_blocking_get_imp #(simple_packet, componentA) get_export;
   simple_packet  pkt;
 
   function new (string name = "componentA", uvm_component parent= null);
      super.new (name, parent);
   endfunction
 
   virtual function void build_phase (uvm_phase phase);
      super.build_phase (phase);
      // Remember that put_port is a class object and it will have to be 
      // created with new ()
      get_export = new ("put_port", this);
   endfunction
 
   // This task will output a new packet 
   virtual task get (output simple_packet pkt);
      // Create a new packet
      pkt = new();
      assert (pkt.randomize());
      `uvm_info ("COMPA", "ComponentB has requested for a packet, give the following packet to componentB", UVM_LOW)
      pkt.print (uvm_default_line_printer);
   endtask
endclass
 

tlm-get

Since componentB has the port, we'll connect it with componentA using the connect() method in the port of componentB.

 
virtual function void connect_phase (uvm_phase phase);
   compB.get_port.connect (compA.get_export);  
endfunction
 

Watch the example !

Simulation Output

 
----------------------------------------------------------------
CDNS-UVM-1.1d (15.10-s004)
(C) 2007-2013 Mentor Graphics Corporation
(C) 2007-2013 Cadence Design Systems, Inc.
(C) 2006-2013 Synopsys, Inc.
(C) 2011-2013 Cypress Semiconductor Corp.
----------------------------------------------------------------
UVM_INFO @ 0: reporter [RNTST] Running test base_test...
UVM_INFO @ 0: reporter [UVMTOP] UVM testbench topology:
----------------------------------------------------
Name              Type                   Size  Value
----------------------------------------------------
uvm_test_top      base_test              -     @2599
  m_top_env       my_env                 -     @2665
    compA         componentA             -     @2696
      put_port    uvm_blocking_get_imp   -     @2775
    compB         componentB             -     @2726
      put_export  uvm_blocking_get_port  -     @2828
----------------------------------------------------
 
UVM_INFO ./tb/tlm.sv(62) @ 0: uvm_test_top.m_top_env.compA [COMPA] ComponentB has requested for a packet, give the following packet to componentB
<unnamed>: (simple_packet@2880) { addr: 'h80  data: 'h3b  rwb: 'h0  }
UVM_INFO ./tb/tlm.sv(89) @ 0: uvm_test_top.m_top_env.compB [COMPB] ComponentA just gave me the packet
-------------------------------------
Name       Type           Size  Value
-------------------------------------
<unnamed>  simple_packet  -     @2880
  addr     integral       8     'h80
  data     integral       8     'h3b
  rwb      integral       1     'h0
-------------------------------------
UVM_INFO ./tb/tlm.sv(62) @ 0: uvm_test_top.m_top_env.compA [COMPA] ComponentB has requested for a packet, give the following packet to componentB
<unnamed>: (simple_packet@2907) { addr: 'h4a  data: 'hc7  rwb: 'h0  }
UVM_INFO ./tb/tlm.sv(89) @ 0: uvm_test_top.m_top_env.compB [COMPB] ComponentA just gave me the packet
-------------------------------------
Name       Type           Size  Value
-------------------------------------
<unnamed>  simple_packet  -     @2907
  addr     integral       8     'h4a
  data     integral       8     'hc7
  rwb      integral       1     'h0
-------------------------------------
UVM_INFO ./tb/tlm.sv(62) @ 0: uvm_test_top.m_top_env.compA [COMPA] ComponentB has requested for a packet, give the following packet to componentB
<unnamed>: (simple_packet@2864) { addr: 'hac  data: 'h6c  rwb: 'h0  }
UVM_INFO ./tb/tlm.sv(89) @ 0: uvm_test_top.m_top_env.compB [COMPB] ComponentA just gave me the packet
-------------------------------------
Name       Type           Size  Value
-------------------------------------
<unnamed>  simple_packet  -     @2864
  addr     integral       8     'hac
  data     integral       8     'h6c
  rwb      integral       1     'h0
-------------------------------------
UVM_INFO ./tb/tlm.sv(62) @ 0: uvm_test_top.m_top_env.compA [COMPA] ComponentB has requested for a packet, give the following packet to componentB
<unnamed>: (simple_packet@2896) { addr: 'hf0  data: 'hd9  rwb: 'h0  }
UVM_INFO ./tb/tlm.sv(89) @ 0: uvm_test_top.m_top_env.compB [COMPB] ComponentA just gave me the packet
-------------------------------------
Name       Type           Size  Value
-------------------------------------
<unnamed>  simple_packet  -     @2896
  addr     integral       8     'hf0
  data     integral       8     'hd9
  rwb      integral       1     'h0
-------------------------------------
UVM_INFO ./tb/tlm.sv(62) @ 0: uvm_test_top.m_top_env.compA [COMPA] ComponentB has requested for a packet, give the following packet to componentB
<unnamed>: (simple_packet@2909) { addr: 'hb0  data: 'h74  rwb: 'h0  }
UVM_INFO ./tb/tlm.sv(89) @ 0: uvm_test_top.m_top_env.compB [COMPB] ComponentA just gave me the packet
-------------------------------------
Name       Type           Size  Value
-------------------------------------
<unnamed>  simple_packet  -     @2909
  addr     integral       8     'hb0
  data     integral       8     'h74
  rwb      integral       1     'h0
-------------------------------------
 
--- UVM Report catcher Summary ---
 
 
Number of demoted UVM_FATAL reports  :    0
Number of demoted UVM_ERROR reports  :    0
Number of demoted UVM_WARNING reports:    0
Number of caught UVM_FATAL reports   :    0
Number of caught UVM_ERROR reports   :    0
Number of caught UVM_WARNING reports :    0
 
--- UVM Report Summary ---
 
** Report counts by severity
UVM_INFO :   12
UVM_WARNING :    0
UVM_ERROR :    0
UVM_FATAL :    0
** Report counts by id
[COMPA]     5
[COMPB]     5
[RNTST]     1
[UVMTOP]     1
Simulation complete via $finish(1) at time 0 FS + 179
 

Next, we'll look at using a TLM Fifo to make both the components operate independently.

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