If you are using UVM, then the environment would probably be setup in a way where the analysis port of each monitor is connected to its implementation inside the scoreboard. In that case, whenever the monitor calls the write method of its analysis port, then the write method for that port will be executed inside the scoreboard. So, the data packet coming from that particular analysis port can be operated upon inside the write method.
If you are using System Verilog, then you'll probably have to implement such a scheme using mailboxes so that data packets from each monitor are sent via separate channels and be identified appropriately. In some cases, I have seen implementations where an ID is tagged with each component which can then be used to filter incoming packets.
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